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SN74S20NE4 Texas Instruments Dual 4-input positive-NAND gates 14-PDIP 0 to 70 visit Texas Instruments
SN74S20N3 Texas Instruments Dual 4-input positive-NAND gates 14-PDIP 0 to 70 visit Texas Instruments
SN74S20N Texas Instruments Dual 4-input positive-NAND gates 14-PDIP 0 to 70 visit Texas Instruments
SN74S20N-00 Texas Instruments S SERIES, DUAL 4-INPUT NAND GATE, PDIP14 visit Texas Instruments
SN74S20N-10 Texas Instruments S SERIES, DUAL 4-INPUT NAND GATE, PDIP14 visit Texas Instruments

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N74S20N Datasheet

Part Manufacturer Description PDF Type
N74S20N Signetics Dual 4-Input NAND Gate Scan
N74S20N Signetics Dual Four Input NAND Gate Scan
N74S20N Signetics Dual Four-Input NAND / AND Gate Scan
N74S20N Signetics Integrated Circuits Catalogue 1978/79 Scan

N74S20N

Catalog Datasheet MFG & Type PDF Document Tags

N7420N

Abstract: N74S20N 54/7420 54H/74H20 54S/74S20 54LS/74LS20 ORDERING CODE {See Section 9 for further Package and Ordering Information.) PIN CONFIGURATIONS PACKAGES PIN CONF. COMMERCIAL RANGES VCC = 5V ± 5%; TA = 0°C to *70°C MILITARY RANGES Vcc = 5V ± 10%; Ta = -55-C to *125°C Plastic DIP Fig. A Fig. A N7420N â'¢ N74H20N N74S20N â'¢ N74LS20N Ceramic DIP Fig. A Fig. A N7420F â'¢ N74H20F N74S20F â'¢ N74LS20F S5420F â'¢ S54H20F S54S20F â'¢ S54LS20F Flatpak Fig. B Fig. A S5420W â'¢ S54H20W S54S20W â'¢ S54LS20W INPUT AND
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OCR Scan
S54LS20 40011 74LS20 74LS20 fanout 74S20 54H/74H 54S/74S 54LS/74LS

7421 ttl AND gate

Abstract: TTL 7421 5V±5%; Ta = 0°C to +70°C Plastic DIP '20 N7420N, N74LS20N, N74S20N '21 N7421N, N74LS21N Plastic SO
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OCR Scan
74LS21 7421 ttl AND gate TTL 7421 7421 pin configuration PIN CONFIGURATION 7420 TTL 7420 logic gate 7421 AND N74LS20D N74S20D N74LS21D 74LS-

ic 7421

Abstract: TTL 7421 Signetics I 7420, 7421, LS20, LS21, S20 Gates H Dual Four-Input NAND ('20) AND ('21) Gate Product Specification Logic Products TYPE 7420 74LS20 74S20 7421 74LS21 TYPICAL PROPAGATION DELAY 10ns 10ns 3ns 12ns 9ns TYPICAL SUPPLY CURRENT (TOTAL) 8mA 0.8mA 8mA 8mA 1.7mA ORDERING CODE PACKAGES COMMERCIAL RANGE VCc = 5V ±5%; Ta = 0 °C to + 70°C N7420N, N74LS20N, N74S20N N7421N, N74LS21N N74LS20D, N74S20D, N74LS21D FUNCTION TABLE INPUTS A L X X X H B X L X X H C X X L X H D X X X L H
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OCR Scan
ic 7421 IC 7420 pin configuration ic 7421 function ic 7421 7421 IC OF IC 7421 WF07S70S WF07S80S

7421 pin configuration

Abstract: 7420 pin configuration Plastic SO NOTE: N7420N, N74LS20N, N74S20N N7421N, N74LS21N N74LS20D, N74S20D, N74LS21D For
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OCR Scan
7420 pin configuration 7421 74LS20 PIN CONFIGURATION 74LS20 function table 74LS21 PIN CONFIGURATION 7420 LS03490S F07580S TA-25

TTL 7421

Abstract: 7421 ttl AND gate Vcc = 5V+5%; Ta = 0°C to + 70°C Plastic DIP '20 N7420N, N74LS20N, N74S20N '21 N7421N, N74LS21 N
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OCR Scan
74LS gates TTL 74ls21 7420 nand 7420 TTL 74ls gate symbols LS03500S

D 8243 HC

Abstract: SO3A 3-lnput NAND Gate 55384D 1 B12 N74S1SN Triple 3-lnput'ANO Gate (o/c) 55385B 1 B175 N74S20N Dual 4
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OCR Scan
N74S00N N74S02N N74S03N N74S04N N74S05N D 8243 HC SO3A B177 N74S00 ITT301 6164 ram 55376D 55377B 55378X

ttl nand gate

Abstract: 74s200 3-lnput NAND Gate 55384D 1 B12 N74S1SN Triple 3-lnput'ANO Gate (o/c) 55385B 1 B175 N74S20N Dual 4
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OCR Scan
ttl nand gate 74s200 B237 CD 5888 transistor b143 e.s N74S04 55379R N74S08M 5S381X N74S09N 55382H N74S10N

N74S00

Abstract: ITT301 3-lnput NAND Gate 55384D 1 B12 N74S1SN Triple 3-lnput'ANO Gate (o/c) 55385B 1 B175 N74S20N Dual 4
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OCR Scan
B147 B218 Signetics SE 540 ID203 6164 ram memory 74S189 55383F N74S11N 56386X N74S22N 5S387R N74S32N

diode LT 42 PR 3002

Abstract: 5603A intersil 3-lnput NAND Gate 55384D 1 B12 N74S1SN Triple 3-lnput'ANO Gate (o/c) 55385B 1 B175 N74S20N Dual 4
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OCR Scan
diode LT 42 PR 3002 5603A intersil b34 DIODE schottky 74s188 74S474 ic 74s201 5S388G N74S37N 5S389E N74S38N 5S580G N74S40N